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Hardware-Conscious Data Processing (ST 2024) - tele-TASKEpisode from the podcastHardware-Conscious Data Processing (ST 2024) - tele-TASK
Field Programmable Gate Arrays (2)

Field Programmable Gate Arrays (2)

Released Wednesday, 10th July 2024
Good episode? Give it some love!
Field Programmable Gate Arrays (2)

Field Programmable Gate Arrays (2)

Field Programmable Gate Arrays (2)

Field Programmable Gate Arrays (2)

Wednesday, 10th July 2024
Good episode? Give it some love!
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From The Podcast

Hardware development continuously advances, with different technologies improving at different paces. While the number of transistors in a CPU package grows, the single-core performance stagnates due to physical limitations. These trends require changes in data processing to keep database management systems efficient. In this lecture, we will take a look at current computer architectures and accelerator technologies and how they can be used for efficient data processing. We will cover CPU and memory architecture, the storage hierarchy, modern memory and storage technologies, such as NVMe, fast interconnects, such as Infiniband, NVLink, and CXL, and accelerators, such as GPUs and FPGAs. The course has a significant practical part, where the students learn to implement data structures and algorithms tailored to hardware-conscious data processing.

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